Authentifiacation

Référence et coordonnées

Références

Marrakh

Rachid

Maître Assistant (MA)

Maroc

Casablanca

Université Hassan II - Casablanca . Faculté des Sciences Ain chock - Casablanca


Coordonnées

Faculté des Sciences Ain chock - Casablanca

05 22 23 06 84

05 22 23 06 74

rmarrakh@yahoo.fr

Formation supérieure

Doctorat National

Micro-électronique

Faculté des Sciences Aïn Chock - Casablanca

2001


Langue

Arabe; Français;

Domaines de compétence
Électronique; Microélectronique
Production Scientifique et technologique

Communication

#1
Bouhdada A., Marrakh R. . Modeling of threshold voltage and surface potentiel of NMOS transistor with localized defects in oxide In : International conférence on modelig and simulation of microsystems, semiconductors, sensors and actuators , 06-04-1998, Santa Clara, California, USA
#2
Bouhdada A., Marrakh R. . Threshold voltage modeling of ion-implanted n-channel submicronic MOS transistor ageing In : International conference on contribution of cognition to modeling , 06-07-1998, Lyon-villeurbanne, France
#3
Bouhdada A., Marrakh R., Bakkali S., Touhami A. . Impact des défauts sur les courants de fuite dans les transistors MOS submicroniques In : Congrès euroméditerranéen de la matière condensée , 08-09-1998, Nantes, France
#4
Bouhdada A., Marrakh R. . Modelling of the threshold voltage variation for a stressed submicronic MOSFET In : International conference on modelling and simulation , 17-05-1999, Santiago de Compostela, Espagne
#5
Bouhdada A., Marrakh R. . Modélisation de la tension de seuil en fonction du stress en vue de la caractérisation du vieillissement des circuits intégrés MOS In : International conference on communications signals and systems , 19-03-2001, Rabat, Maroc
#6
Bouhdada A., Marrakh R. . Modeling of the threshold voltage variation for a stressed submicronic MOSFET In : The 13th international conference on microelectronics , 29-10-2001, EMI-Rabat, Morocco
#7
Bouhdada A., Marrakh R. . Relation between the I-V characteristic degradation and the stress for submicronic nMOS transistor In : International conference applied simulation & modeling , 04-09-2001, Marbella, Espagne

Article de périodique

#1
Bouhdada A., Bakkali S., Nouaçry A., Touhami A., Marrakh R. . Effects of defects localised in the oxide of submicrometer NMOS transistor, on substrate and drain currents. Microelectronics journal , 1998.
#2
Marrakh R., Bouhdada A. . Modelling of the surface potential evolution for stressed submicronic MOSFET. Microelectronics journal , 1999.
#3
Marrakh R., Bouhdada A. . Modeling of surface potential and threshold voltage of LDD Mosfet’s with localized defects. Active and passive electronic components , 2000.
#4
Marrakh R., Bouhdada A. . Modeling of interface defect distribution for an n-Mosfet's under hot-carrier stressing. Active and passive electronic components , 2000.
#5
Marrakh R., Bouhdada A. . Impact of the stress on the sub-micron n-metal oxide semiconductor field effect transistor characteristics. Active and Passive Elec. Comp. , 2001.
#6
Marrakh R., Bouhdada A. . Modeling of the I-V characteristics for a LDD-n-Mosfet' s in relation with defects induced by the stress. Active and Passive Elec. Comp. , 2003.
#7
Marrakh R., Bouhdada A. . Modeling of the spectral response of PIN photodetectors impact of exposed zone thickness, surface recombination velocity and trap concentration. Microelectronics reliability , 2004.